?2004 fairchild semiconductor corporation april 2004 FDT461N rev. a1 FDT461N FDT461N n-channel logic level powertrench ? mosfet 100v, 0.4a, 2.5 ? features ?r ds(on) = 1.45 ? (typ.), v gs = 4.5v, i d = 0.4a ?q g (tot) = 2.36nc (typ.), v gs = 10v ? low miller charge ? low q rr body diode applications ? servo motor load control ? dc-dc converters mosfet maximum ratings t a = 25c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v dss drain to source voltage 100 v v gs gate to source voltage 20 v i d drain current 0.54 a continuous (t a = 25 o c, v gs = 10v, r ja = 110 o c/w) continuous (t a = 25 o c, v gs = 4.5v, r ja = 110 o c/w) 0.4 a pulsed figure 4 a e as single pulse avalanche energy (note 1) 6.3 mj p d power dissipation 1.13 w derate above 25 o c9mw/ o c t j , t stg operating and storage temperature -55 to 150 o c r ja thermal resistance junction to ambient sot-223, pad area = 0.171 in 2 11 0 o c/w r ja thermal resistance junction to ambient sot-223, pad area = 0.068 in 2 128 o c/w r ja thermal resistance junction to ambient sot-223, pad area = 0.026 in 2 147 o c/w device marking device package reel size tape width quantity 461 FDT461N sot-223 13? 12mm 2500 units drain source gate drain (flange) s g d d sot-223
?2004 fairchild semiconductor corporation FDT461N rev. a1 FDT461N electrical characteristics t a = 25c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics (v gs = 10v) drain-source diode characteristics notes: 1: starting t j = 25c, l = 67mh, i as = 0.43a. symbol parameter test conditions min typ max units b vdss drain to source breakdown voltage i d = 250 a, v gs = 0v 100 - - v i dss zero gate voltage drain current v ds = 80v - - 1 a v gs = 0v t c = 125 o c - - 250 i gss gate to source leakage current v gs = 20v - - 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 a0.8-2v r ds(on) drain to source on resistance i d = 0.54a, v gs = 10v - 1.40 2.0 ? i d = 0.4a, v gs = 4.5v - 1.45 2.5 i d = 0.54a, v gs = 10v, t j = 150 o c -2.804.0 c iss input capacitance v ds = 25v, v gs = 0v, f = 1mhz -74-pf c oss output capacitance - 11 - pf c rss reverse transfer capacitance - 2.5 - pf q g(tot) total gate charge at 10v v gs = 0v to 10v v dd = 50v i d = 0.54a i g = 1.0ma 2.36 4.0 nc q g(4.5) total gate charge at 4.5v v gs = 0v to 4.5v - 1.27 2.0 nc q g(th) threshold gate charge v gs = 0v to 1v 0.1 0.15 nc q gs gate to source gate charge - 0.37 - nc q gs2 gate charge threshold to plateau - 0.27 - nc q gd gate to drain ?miller? charge - 0.25 - nc t on turn-on time v dd = 50v, i d = 0.54a v gs = 10v, r gs = 120 ? --6.5ns t d(on) turn-on delay time - 3 - ns t r rise time - 1.3 - ns t d(off) turn-off delay time - 63 - ns t f fall time - 12 - ns t off turn-off time - - 113 ns v sd source to drain diode voltage i sd = 0.54a - - 1.25 v i sd = 0.3a - - 1.0 v t rr reverse recovery time i sd = 0.54a, di sd /dt = 100a/ s- - 22 ns q rr reverse recovered charge i sd = 0.54a, di sd /dt = 100a/ s- - 18 nc
?2004 fairchild semiconductor corporation FDT461N rev. a1 FDT461N typical characteristics t a = 25c unless otherwise noted figure 1. normalized power dissipation vs ambient temperature figure 2. maximum continuous drain current vs case temperature figure 3. normalized maximum transient thermal impedance figure 4. peak current capability t a , ambient temperature ( o c) power dissipation multiplier 0 0255075100 150 0.2 0.4 0.6 0.8 1.0 1.2 125 0 0.2 0.4 25 50 75 100 125 150 0.6 i d , drain current (a) t a , case temperature ( o c) v gs = 10v v gs = 4.5v t, rectangular pulse duration (s) z ja , normalized thermal impedance notes: duty factor: d = t 1 /t 2 peak t j = p dm x z ja x r ja + t a p dm t 1 t 2 0.5 0.2 0.1 0.05 0.01 0.02 duty cycle - descending order single pulse 0.01 0.1 1 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 10 3 2 10 -5 i dm , peak current (a) t, pulse width (s) t a = 25 o c i = i 25 150 - t a 125 for temperatures above 25 o c derate peak current as follows: transconductance may limit current in this region v gs = 4.5v 1 10 0.4 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 10 3
?2004 fairchild semiconductor corporation FDT461N rev. a1 FDT461N figure 5. forward bias safe operating area figure 6. transfer characteristics figure 7. saturation characteristics figure 8. drain to source on resistance vs gate voltage and drain current figure 9. normalized drain to source on resistance vs junction temperature figure 10. normalized gate threshold voltage vs junction temperature typical characteristics t a = 25c unless otherwise noted 0.01 0.1 1 110 120 4 v ds , drain to source voltage (v) i d , drain current (a) t j = max rated t a = 25 o c single pulse limited by r ds(on) area may be operation in this 100 s 1ms 10ms 0 0.4 0.8 1.2 1.6 1.5 2.0 2.5 3.0 3.5 i d , drain current (a) v gs , gate to source voltage (v) pulse duration = 80 s duty cycle = 0.5% max v dd = 15v t j = 175 o c t j = 25 o c t j = -55 o c 0 0.4 0.8 1.2 1.6 0 0.5 1.0 1.5 2.0 2.5 3.0 i d , drain current (a) v ds , drain to source voltage (v) v gs = 2.5v pulse duration = 80 s duty cycle = 0.5% max t a = 25 o c v gs = 3v v gs = 4.5v 1.0 1.5 2.0 2.5 3.0 2345678910 i d = 0.2a v gs , gate to source voltage (v) i d = 0.54a r ds(on) , drain to source on resistance ( ? ) pulse duration = 80ms duty cycle = 0.5% max 0.5 1.0 1.5 2.0 -80 -40 0 40 80 120 160 normalized drain to source t j , junction temperature ( o c) on resistance v gs = 10v, i d = 0.54a pulse duration = 80 s duty cycle = 0.5% max 0.6 0.8 1.0 1.2 -80 -40 0 40 80 120 160 v gs = v ds , i d = 250 a normalized gate t j , junction temperature ( o c) threshold voltage
?2004 fairchild semiconductor corporation FDT461N rev. a1 FDT461N figure 11. normalized drain to source breakdown voltage vs junction temperature figure 12. capacitance vs drain to source voltage figure 13. gate charge waveforms for constant gate current typical characteristics t a = 25c unless otherwise noted 0.9 1.0 1.1 -80 -40 0 40 80 120 160 1.2 t j , junction temperature ( o c) normalized drain to source i d = 250 a breakdown voltage 1 10 100 0.1 1 10 100 200 c, capacitance (pf) v ds , drain to source voltage (v) v gs = 0v, f = 1mhz c iss = c gs + c gd c oss ? c ds + c gd c rss = c gd 0 2 4 6 8 10 0 0.5 1.0 1.5 2.0 2.5 v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 50v i d = 0.54a test circuits and waveforms figure 14. unclamped energy test circuit figure 15. unclamped energy waveforms t p v gs 0.01 ? l i as + - v ds v dd r g dut vary t p to obtain required peak i as 0v v dd v ds bv dss t p i as t av 0
?2004 fairchild semiconductor corporation FDT461N rev. a1 FDT461N figure 16. gate charge test circuit figure 17. gate charge waveforms figure 18. switching time test circuit figure 19. switching time waveforms test circuits and waveforms (continued) v gs + - v ds v dd dut i g(ref) l v dd q g(th) v gs = 1v q g(4.5) v gs = 4.5v q g(tot) v gs = 10v v ds v gs i g(ref) 0 0 q gs q gd v gs r l r gs dut + - v dd v ds v gs t on t d(on) t r 90% 10% v ds 90% 10% t f t d(off) t off 90% 50% 50% 10% pulse width v gs 0 0
?2004 fairchild semiconductor corporation FDT461N rev. a1 FDT461N pspice electrical model .subckt FDT461N 2 1 3 ; rev january 2004 ca 12 8 1.5e-10 cb 15 14 1.1e-10 cin 6 8 7.0e-11 dbody 7 5 dbodymod dbreak 5 11 dbreakmod dplcap 10 5 dplcapmod ebreak 11 7 17 18 109.7 eds 14 8 5 8 1 egs 13 8 6 8 1 esg 6 10 6 8 1 evthres 6 21 19 8 1 evtemp 20 6 18 22 1 it 8 17 1 lgate 1 9 5.29e-9 ldrain 2 5 1.0e-9 lsource 3 7 5.71e-9 rlgate 1 9 52.9 rldrain 2 5 10 rlsource 3 7 57.1 mmed 16 6 8 8 mmedmod mstro 16 6 8 8 mstromod mweak 16 21 8 8 mweakmod rbreak 17 18 rbreakmod 1 rdrain 50 16 rdrainmod 0.9 rgate 9 20 3.94 rslc1 5 51 rslcmod 1e-6 rslc2 5 50 1e3 rsource 8 7 rsourcemod 0.5 rvthres 22 8 rvthresmod 1 rvtemp 18 19 rvtempmod 1 s1a 6 12 13 8 s1amod s1b 13 12 13 8 s1bmod s2a 6 15 14 13 s2amod s2b 13 15 14 13 s2bmod vbat 22 19 dc 1 eslc 51 50 value={(v(5,51)/abs(v(5,51)))*(pwr(v(5,51)/(1e-6*15),2.5))} .model dbodymod d (is=6.4e-11 rs=8.0e-3 ikf=0.9 trs1=2.5e-3 trs2=9.5e-6 + cjo=2.2e-11 m=0.52 tt=2.9e-8 xti=0.1) .model dbreakmod d (rs=0.6 trs1=1.4e-3 trs2=-5.0e-5) .model dplcapmod d (cjo=3.9e-11 is=1e-30 n=10 m=0.67) .model mmedmod nmos (vto=1.75 kp=1.2 is=1e-30 n=10 tox=1 l=1u w=1u rg=3.94 t_abs=25) .model mstromod nmos (vto=2.03 kp=12 is=1e-30 n=10 tox=1 l=1u w=1u t_abs=25) .model mweakmod nmos (vto=1.46 kp=0.02 is=1e-30 n=10 tox=1 l=1u w=1u rg=39.4 rs=0.1 t_abs=25) .model rbreakmod res (tc1=1.0e-3 tc2=-8.8e-7) .model rdrainmod res (tc1=7.0e-3 tc2=2.0e-5) .model rslcmod res (tc1=1.0e-3 tc2=9.0e-6) .model rsourcemod res (tc1=4.8e-3 tc2=1.0e-6) .model rvthresmod res (tc1=-9.0e-4 tc2=-7.0e-6) .model rvtempmod res (tc1=-2.1e-3 tc2=1.8e-6) model s1amod vswitch (ron=1e-5 roff=0.1 von=-5.0 voff=-2.0) .model s1bmod vswitch (ron=1e-5 roff=0.1 von=-2.0 voff=-5.0) .model s2amod vswitch (ron=1e-5 roff=0.1 von=-0.4 voff=0.3) .model s2bmod vswitch (ron=1e-5 roff=0.1 von=0.3 voff=-0.4) .ends note: for further discussion of the pspice model, consult a new pspice sub-circuit for the power mosfet featuring global temperature options ; ieee power electronics specialist conference records, 1991, written by william j. hepp and c. frank wheatley. 18 22 + - 6 8 + - 5 51 + - 19 8 + - 17 18 6 8 + - 5 8 + - rbreak rvtemp vbat rvthres it 17 18 19 22 12 13 15 s1a s1b s2a s2b ca cb egs eds 14 8 13 8 14 13 mweak ebreak dbody rsource source 11 7 3 lsource rlsource cin rdrain evthres 16 21 8 mmed mstro drain 2 ldrain rldrain dbreak dplcap eslc rslc1 10 5 51 50 rslc2 1 gate rgate evtemp 9 esg lgate rlgate 20 + - + - + - 6
?2004 fairchild semiconductor corporation FDT461N rev. a1 FDT461N saber electrical model rev january 2004 template FDT461N n2,n1,n3 = m_temp number m_temp=25 electrical n2,n1,n3 { var i iscl dp..model dbodymod = (isl=6.4e-11,rs=8.0e-3,ikf=0.9,trs1=2.5e-3,trs2=9.5e-6,cjo=2.2e-11,m=0.52,tt=2.9e-8,xti=0.1) dp..model dbreakmod = (rs=0.6,trs1=1.4e-3,trs2=-5e-5) dp..model dplcapmod = (cjo=3.9e-11,isl=10e-30,nl=10,m=0.67) m..model mmedmod = (type=_n,vto=1.75,kp=1.2,is=1e-30, tox=1) m..model mstrongmod = (type=_n,vto=2.03,kp=12,is=1e-30, tox=1) m..model mweakmod = (type=_n,vto=1.46,kp=0.02,is=1e-30, tox=1,rs=0.1) sw_vcsp..model s1amod = (ron=1e-5,roff=0.1,von=-5.0,voff=-2.0) sw_vcsp..model s1bmod = (ron=1e-5,roff=0.1,von=-2.0,voff=-5.0) sw_vcsp..model s2amod = (ron=1e-5,roff=0.1,von=-0.4,voff=0.3) sw_vcsp..model s2bmod = (ron=1e-5,roff=0.1,von=0.3,voff=-0.4) c.ca n12 n8 = 1.5e-10 c.cb n15 n14 = 1.1e-10 c.cin n6 n8 = 7.0e-11 dp.dbody n7 n5 = model=dbodymod dp.dbreak n5 n11 = model=dbreakmod dp.dplcap n10 n5 = model=dplcapmod spe.ebreak n11 n7 n17 n18 = 109.7 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evthres n6 n21 n19 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 i.it n8 n17 = 1 l.lgate n1 n9 = 5.29e-9 l.ldrain n2 n5 = 1.0e-9 l.lsource n3 n7 = 5.71e-9 res.rlgate n1 n9 = 52.9 res.rldrain n2 n5 = 10 res.rlsource n3 n7 = 57.1 m.mmed n16 n6 n8 n8 = model=mmedmod, temp=m_temp, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, temp=m_temp, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, temp=m_temp, l=1u, w=1u res.rbreak n17 n18 = 1, tc1=1.0e-3,tc2=-8.8e-7 res.rdrain n50 n16 = 0.9, tc1=7.0e-3,tc2=2.0e-5 res.rgate n9 n20 = 3.94 res.rslc1 n5 n51 = 1e-6, tc1=1.0e-3,tc2=9.0e-6 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 0.5, tc1=4.8e-3,tc2=1e-6 res.rvthres n22 n8 = 1, tc1=-9.0e-4,tc2=-7.0e-6 res.rvtemp n18 n19 = 1, tc1=-2.1e-3,tc2=1.8e-6 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1 equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/15))** 2.5)) } } 18 22 + - 6 8 + - 19 8 + - 17 18 6 8 + - 5 8 + - rbreak rvtemp vbat rvthres it 17 18 19 22 12 13 15 s1a s1b s2a s2b ca cb egs eds 14 8 13 8 14 13 mweak ebreak dbody rsource source 11 7 3 lsource rlsource cin rdrain evthres 16 21 8 mmed mstro drain 2 ldrain rldrain dbreak dplcap iscl rslc1 10 5 51 50 rslc2 1 gate rgate evtemp 9 esg lgate rlgate 20 + - + - + - 6
?2004 fairchild semiconductor corporation FDT461N rev. a1 FDT461N pspice thermal model rev january 2004 FDT461N_ja junction ambient copper area= 1sq.in ctherm1 junction c2 3.0e-5 ctherm2 c2 c3 3.2e-5 ctherm3 c3 c4 2.0e-4 ctherm4 c4 c5 9.6e-2 ctherm5 c5 c6 8.9e-1 ctherm6 c6 c7 9.1e-1 ctherm7 c7 c8 9.3e-1 ctherm8 c8 ambient 7 rtherm1 junction c2 0.5 rtherm2 c2 c3 6 rtherm3 c3 c4 9 rtherm4 c4 c5 10 rtherm5 c5 c6 11 rtherm6 c6 c7 12 rtherm7 c7 c8 13 rtherm8 c8 ambient 16 saber thermal model saber thermal model FDT461N copper area= 1sq.in template thermal_model th tl thermal_c th, tl { ctherm.ctherm1 th c2 = 3.0e-5 ctherm.ctherm2 c2 c3 = 3.2e-5 ctherm.ctherm3 c3 c4 = 2.0e-4 ctherm.ctherm4 c4 c5 = 9.6e-2 ctherm.ctherm5 c5 c6 = 8.9e-1 ctherm.ctherm6 c6 c7 = 9.1e-1 ctherm.ctherm7 c7 c8 = 9.3e-1 ctherm.ctherm8 c8 tl = 7 rtherm.rtherm1 th c2 = 0.5 rtherm.rtherm2 c2 c3 = 6 rtherm.rtherm3 c3 c4 = 9 rtherm.rtherm4 c4 c5 = 10 rtherm.rtherm5 c5 c6 = 11 rtherm.rtherm6 c6 c7 = 12 rtherm.rtherm7 c7 c8 = 13 rtherm.rtherm8 c8 tl = 16 } rtherm6 rtherm8 rtherm7 rtherm5 rtherm4 rtherm3 ctherm4 ctherm6 ctherm5 ctherm3 ctherm2 ctherm1 tl 8 7 6 5 4 3 junction ambient 2 th rtherm2 rtherm1 ctherm7 ctherm8
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